Diseños con FPGA.
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2017-09-01
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Jaén: Universidad de Jaén
Resumen
En el presente proyecto “Diseños con FPGA” se han planteado varios ejercicios prácticos para desarrollar en la
placa Basys 3 de Xilinx utilizando como lenguaje de síntesis el lenguaje VHDL.
El objetivo principal es proporcionar una guía práctica para la iniciación dentro del diseño digital.
Se parte así, desde un punto inicial sentando las bases sobre los dispositivos FPGA, pasando por una
descripción para utilización del lenguaje VHDL, hasta finalmente aprender a utilizar el software proporcionado
por el fabricante de la placa para sintetizar y llevar a la práctica los diseños digitales.
In the present project “Diseños con FPGA" several practical exercises have been proposed to be developed in the Basys 3 board of Xilinx using as language of synthesis the language VHDL. The main objective is to provide a practical guide for initiation into digital design. This project, starts from a initial point by laying the foundations on the FPGA devices, passing through a description of how to use the VHDL language, until finally learning how to use the software provided by the board manufacturer to synthesize and implement the digital designs.
In the present project “Diseños con FPGA" several practical exercises have been proposed to be developed in the Basys 3 board of Xilinx using as language of synthesis the language VHDL. The main objective is to provide a practical guide for initiation into digital design. This project, starts from a initial point by laying the foundations on the FPGA devices, passing through a description of how to use the VHDL language, until finally learning how to use the software provided by the board manufacturer to synthesize and implement the digital designs.